IBM has developed a new chip technology that integrates electrical and optical devices on the same piece of silicon, enabling data transfer using pulses of light.
The CMOS Integrated Silicon Nanophotonics technology delivers a ten-fold improvement in integration density compared to current manufacturing techniques, says IBM, resulting in smaller, faster and more power-efficient chips.
Indeed, with the new technology, a single transceiver channel with all accompanying optical and electrical circuitry occupies only 0.5mm2.
The development will provide a big boost to the company’s Exascale computing program, which is aimed at developing a supercomputer that can perform one million trillion calculations — an Exaflop — in a single second. That would make it around a thousand times faster than the fastest machine today.
“The development of the Silicon Nanophotonics technology brings the vision of on-chip optical interconnections much closer to reality,” says Dr TC Chen, IBM’s vice president of science and technology.
“With optical communications embedded into the processor chips, the prospect of building power-efficient computer systems with performance at the Exaflop level is one step closer to reality.”
The silicon transistors can share the same silicon layer with silicon nanophotonics devices, meaning the new technology can be produced on the front-end of a standard CMOS manufacturing line, without new or special tooling.
To make this possible, researchers developed a suite of integrated active and passive silicon nanophotonics devices that are all scaled down to the diffraction limit – the smallest size that dielectric optics can reach.
“Our CMOS Integrated Nanophotonics breakthrough promises unprecedented increases in silicon chip function and performance via ubiquitous low-power optical communications between racks, modules, chips or even within a single chip itself,” says Dr Yurii A Vlasov, manager of the silicon nanophotonics department at IBM Research.
“The next step in this advancement is to establishing manufacturability of this process in a commercial foundry using IBM deeply-scaled CMOS processes.”