Consortium demonstrates self-repairing chip

European consortium Crisp says it’s created a self-testing and self-repairing chip that can test cores and connections, with a resource manager dynamically assigning the chip’s tasks to fault-free parts.

While shrinking chips has manifold advantages, it brings with it physical limitations that mean lower production yields and earlier break-downs.

“Because of the rapidly growing transistor density on chips, it has become a real challenge to ensure high system dependability,” says Hans Kerkhoff, associate professor at the University of Twente.

The Crisp technique combines a test for faulty components and connections on chips with a run-time resource manager which assigns tasks and communication channels to components and pathways that are known to be reliable. This allows many-core chips with some faulty cores to pass production test, as they’ll still be able to function perfectly.

“The solution is not to make non-degradable chips, it’s to make architectures that can degrade while they keep functioning, which we call graceful degradation. With the right dependability infrastructure many-cores can be a solution,” says Kerkhoff.

Thanks to the resource manager, any core can handle any task, so that functioning ones can take over when another fails and the chip can repair itself, extending its longevity.

“Combining testing for faulty components and a run-time resource manager forms the heart of a flexible reconfigurable chip, that can handle changing tasks and failing components during its entire fit life,” says Bart Vermeulen, senior principal scientist at NXP.