Chip foundry GlobalFoundries (GloFo) said it has demonstrated technology at its New York State fab that allow chips to be stacked one on another.
The company said it has demonstrated 20 nanometer silicon wafers with integrated Through Silicon Vias (TSVs).
That lets 3D chis give another way to increase performance and bandwidth while still keeping down the power requirements.
The TSVs are etched into a silicon wafer filled with a conducting material, letting the vertically stacked ICs communicate with each other.
GloFo puts the TSVs into the silicon before starting the back end of the line process, so avoiding high temperatures and the ability to use copper as the fill material. The company developed a contact protection scheme to give SRAM functionality.
David McCann, VP of packaging R&D at GloFo, said that the industry has talked about 3D chip stacking for years, but its development shows that the technique will soon become a reality. The next step in development is to assemble and qualify 3D test vehicles in conjunction with its customers.
